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| IRFPG40 Data Sheet July 1999 File Number 2879.2 4.3A, 1000V, 3.500 Ohm, N-Channel Power MOSFET This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA09850. Features * 4.3A, 1000V * rDS(ON) = 3.500 * UIS SOA Rating Curve (Single Pulse) * -55oC to 150oC Operating and Storage Temperature Symbol D G Ordering Information PART NUMBER IRFPG40 PACKAGE TO-247 BRAND IRFPG40 S NOTE: When ordering, include the entire part number. Packaging JEDEC STYLE TO-247 SOURCE DRAIN GATE DRAIN (TAB) 4-365 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 IRFPG40 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified IRFPG40 Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDSS Drain to Gate Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 1000 1000 4.3 17 20 150 1.2 490 -55 to 150 300 260 UNITS V V A A V W W/ oC mJ oC oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 250A, VGS = 0V (Figure 9) VDS = VGS, ID = 250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC MIN 1000 2.0 3.5 ID = 3.9A, VDS = 800V, VGS = 10V (Figure 13) Free Air Operation MAX 4.0 25 250 100 3.5 30 50 170 50 120 0.83 40 UNITS V V A A nA S ns ns ns ns nC oC/W oC/W Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) RJC RJA VGS = 20V ID = 2.5A, VGS = 10V (Figures 7, 8) ID = 2.5A, VDS = 100V (Figure 11) VDD = 500V, I = 3.9A, RGS = 9.1, RL = 120 VGS = 10V Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage Reverse Recovery Time NOTES: 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. 4. VDD = 25V, starting TJ = 25oC, L = 640H, RG = 25, peak IAS = 9.2A (Figure 3). SYMBOL VSD trr TEST CONDITIONS ISD = 4.3A (Figure 12) ISD = 3.9A, dlSD/dt = 100A/s MIN MAX 1.8 1000 UNITS V ns 4-366 IRFPG40 Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER Unless Otherwise Specified 100 TJ = MAX RATED, TC = 25oC SINGLE PULSE 10s 1.0 ID, DRAIN CURRENT (A) 10 0.8 0.6 0.4 0.2 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150 0.01 1 100s 1 1ms 10ms 0.10 OPERATION IN THIS AREA LIMITED BY rDS(ON) DC 10 100 1000 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. FORWARD BIAS SAFE OPERATING AREA 100 If R = 0 tAV = (L)(IAS)/(1.3 RATED BVDSS - VDD) If R 0 tAV = (L/R) In[(Ias x R)/(1.3 RATED BVDSS - VDD) + 1] IDM 10 STARTING TJ = 25oC 10 VGS = 10V 8 DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 6 VGS = 5V VGS = 6V ID, DRAIN CURRENT (A) 4 2 STARTING TJ = 150oC 1 0.01 0.10 1.00 10.00 0 0 100 200 300 400 VDS , DRAIN TO SOURCE VOLTAGE (V) 500 VGS = 4V TIME IN AVALANCHE (ms) FIGURE 3. UNCLAMPED INDUCTIVE SWITCHING SOA FIGURE 4. OUTPUT CHARACTERISTICS 10 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TC = 25oC VGS = 10V VGS = 6V 5 ID, DRAIN CURRENT (A) 8 4 DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS = 7V 6 VGS = 5V 4 3 2 150oC 1 25oC 2 VGS = 4V 0 0 10 20 30 40 VDS , DRAIN TO SOURCE VOLTAGE (V) 50 0 0 2 4 6 VGS , GATE TO SOURCE VOLTAGE (V) 8 FIGURE 5. SATURATION CHARACTERISTICS FIGURE 6. TRANSFER CHARACTERISTICS 4-367 IRFPG40 Typical Performance Curves 6 5 DRAIN TO SOURCE ON RESISTANCE () 4 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V Unless Otherwise Specified (Continued) 3.0 NORMALIZED DRAIN TO SOURCE ON RESISTANCE PULSE DURATION = 80s 2.7 DUTY CYCLE = 0.5% MAX ID = 2.5A, VGS = 10V 2.5 2.2 2.0 1.7 1.5 1.3 1.0 0.8 0 -50 0 50 100 TJ , JUNCTION TEMPERATURE (oC) 150 3 2 1 0 0 2 4 8 6 ID , DRAIN CURRENT (A) 10 12 FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 1.3 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE FIGURE 8. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE ID = 250A 3000 2500 C, CAPACITANCE (pF) 2000 1500 CRSS 1000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD 1.2 CISS COSS 1.1 1.0 0.9 500 0 -60 0 1 10 VDS , DRAIN TO SOURCE VOLTAGE (V) 100 -40 -20 0 20 40 60 80 100 120 140 150 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs. JUNCTION TEMPERATURE FIGURE 10. CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE gfs, FORWARD TRANSCONDUCTANCE (S) 8 25oC 6 150oC ISD, SOURCE TO DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 70V 100 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 150oC 10 25oC 4 1 2 0 0 1 2 3 4 ID , DRAIN CURRENT (A) 5 6 0.1 0 0.3 0.6 0.9 1.2 1.5 SOURCE TO DRAIN VOLTAGE (V) FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE 4-368 IRFPG40 Typical Performance Curves 16 GATE TO SOURCE VOLTAGE (V) 14 12 10 8 6 4 2 0 0 10 20 30 40 50 60 70 80 Qg, GATE CHARGE (nC) VDS = 100V VDS = 200V VDS = 400V Unless Otherwise Specified (Continued) FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE Test Circuits and Waveforms VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD + - 0V IAS 0.01 0 tAV FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS tON td(ON) tr RL VDS 90% tOFF td(OFF) tf 90% + RG DUT - VDD 0 10% 90% 10% VGS VGS 0 10% 50% PULSE WIDTH 50% FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS 4-369 IRFPG40 Test Circuits and Waveforms (Continued) CURRENT REGULATOR VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS 12V BATTERY 0.2F 50k 0.3F G DUT 0 IG(REF) 0 IG CURRENT SAMPLING RESISTOR S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0 FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 4-370 |
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